[ 3 / biz / cgl / ck / diy / fa / ic / jp / lit / sci / vr / vt ] [ index / top / reports ] [ become a patron ] [ status ]
2023-11: Warosu is now out of extended maintenance.

/sci/ - Science & Math

View post   
File: 3 KB, 398x263, gates3[1].gif [View same] [iqdb] [saucenao] [google]
4360103 No.4360103 [Reply] [Original]

Can anyone help me design a digital logic circuit? I need to compare two 3-bit numbers using only two input namd and xor gates.

thx

>> No.4360108

ok now listen

>> No.4360110

first, you need to make a truth table for it.

do it.

>> No.4360123

i need to do it for all possible combinations (except repeats) of the bits right? but i feel like I already have too many terms and i'm awful at simplifying boolean expressions with xor

>> No.4360139

>>4360123
I hate karnaugh mapping so i simplify using boolean algebra, that's the long way.

just refer to this if you're having trouble.

an easy way to organize your truth table is put your bits into rows. that's A B C D E F.

for F, start by making 0 1 0 1 0 1 0 1...
for E, do 0 0 1 1 0 0 1 1..
for D, do 0 0 0 0 1 1 1 1..

it's going to be pretty long because you have 6 bits, but that pattern will make sure all combinations are covered

>> No.4360140

>>4360139
http://www.seas.upenn.edu/~ese570/Boolean_Identities.pdf

>> No.4360166

ya that's what I was thinking. 6 bits is gonna have 64 outputs