/diy/ - Do It Yourself

i'm trying to build a charger/BMS solution for a 1S2P 18650 pack. i chose TP4056 for linear charger and FS312F-G (functionally almost identical to the classic DW01/DW01A) with a high side P-FET and zener diode for power path management. i want these cells "as protected as possible." i understand that parallel cells will see the same voltage and whatnot, but differing internal resistances and other factors can introduce risks.

pic related is the schematic. i'm pretending J1/BATT1 has lower internal resistance so higher current capability (red trace) and J2/BATT2 has higher internal resistance so lower current capability.

am i correct in believing that there's absolutely no benefit to using two FS312 since it senses low side return current (the sum of BATT1 + BATT2)? if i'm correct, how are parallel cells typically protected in commercial designs?