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>> No.1150763 [View]
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1150763

Hi guys. I've got a question about digital logic being controlled by analog circuitry.

This circuit will have the digital input typically be high, with the switch open and cap charged to 5V. When the switch closes, the digital input is pulled low, and the cap instantaneously discharges.

Now, when the switch opens again, the cap begins to charge again, and the voltage at the digital input increases. The chip has low defined as <1.35V, and high as >3.15V. It's the intermediate region that I'm concerned about. The RC should have a time constant of a few seconds, so it'll be in the uncertain region for a while. Will there be a smooth transition point that the manufacturer doesn't spec because it varies chip to chip? Will it jitter, rapidly switching from 0 to 1 in that region?

Thanks in advance. If it matters, the chip is a CD74HC4053E.

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