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/diy/ - Do It Yourself


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>> No.2687285 [View]
File: 95 KB, 1170x538, DRV.png [View same] [iqdb] [saucenao] [google]

Looks like the low-side gate driver's supply voltage VGLS comes directly from a linear regulator tied to the input voltage VM. I imagine VGLS is hence capped at no more than VM, as it often is with these monolithic gate drivers. If you do use at VM < 10V, I'd want to use logic level power MOSFETs. It also seems to use only a single charge pump for all three high-side drivers, and no bootstrap caps, which is unusual. VGLS also isn't being fed into this charge pump, so I guess it's somehow self-regulating even at high VM values. If you're lucky you'll get a higher high side drive voltage than VM, not that it helps much. Not too fond of the lack of a traditional bootstrap circuit, I hear it's more likely to give a spike of excessive gate voltage like that, though if there's an internal zener I guess it's fine.

The 1A gate drive is ok, but without the external bootstrap cap there's no external high-side power rail on which to slap a ZXGD300x. That's why I'll probably go for a DRV830x or equivalent Trinamic 3-phase gate driver IC, in conjunction with a TMC4671 FOC controller. Current sensing will be a pain.

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